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Other seeking:
Weirdo seeks the similarly motivated to engage in building a better mousetrap - a very niche mousetrap running on hardware you probably don't even have want.
Hobbies include:
spelunking through the ESP-IDF
using google translate on chinese technical documentation, and then coding against what i get back
writing random missives on the code project lounge
writing code that gives @SanderRossel fits
Turn offs include
holy rolling (unless it's about a technology i also holy roll about)
caring too much about standards (we take a buddhist approach to coding standards in *this* house - *blows nose on robes* - don't get too attached to anything)
avoiding the undocumented parts
But if anyone wants to help come up with a better way to do FAT32 on an ESP32, and wrap or improve the IDF in general i'll be over here, trying to learn Mandarin.
Real programmers use butterflies
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honey the codewitch wrote: i'll be over here, trying to learn Mandarin
A politician or political commentator in the UK (I forget who) recently said "why do we teach kids French in school; it would be far more useful to teach them Japanese"[1]. As far as I can see, learning Mandarin would be the better alternative.
Footnote:-
1: He didn't pronounce the semi-colon. I added that for the sake of efficient paraphrasing. 
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I recognise that it is deeply ironic that I have a French surname but speak French rather badly.
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london ? 
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Cos I'm a Londoner. In fact a genuine Cockney in that I was born with the sound range of Bow Bells.
P.S. For the avoidance of doubt, the "r" bit refers to my surname.
modified 3-Mar-21 15:57pm.
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Some talking head opined: "why do we teach kids French in school; it would be far more useful to teach them Japanese"
Because mispronouncing Japanese is just business; mispronouncing French is a pleasure.
Freedom is the freedom to say that two plus two make four. If that is granted, all else follows.
-- 6079 Smith W.
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When in Paris I found that if I asked anyone if they spoke English they would say, "non" and look disgustedly at me as if to say, "Why don't you speak French, you English Pig?"
So then I would start speaking French to them, thanks to my excellent English education!
Immediately, they remembered that they did, in fact, speak English (probably due to their French education) and refused to speak to me in anything but English - still looking at me disgustedly as if to say, "Stop butchering my language, you English Pig!" 
- I would love to change the world, but they won’t give me the source code.
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Just cheat and throw extra hardware at it:
Google ch376
(Sorry, was going to throw a link in here, but it looked terrible)
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honey the codewitch wrote: writing code that gives @SanderRossel fits
Made me laugh while drinking coffee, messy 
Bastard Programmer from Hell 
"If you just follow the bacon Eddy, wherever it leads you, then you won't have to think about politics." -- Some Bell.
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honey the codewitch wrote: writing code that gives @SanderRossel fits
So you're planning to write code that's not absolutely 100% perfect according to my strict guidelines!? 
Well, I do love me a good witch burning
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bespoke polo catering stimulated the senses (12)
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ORGANOLEPTIC
Bespoke - anagram indicator of
polo catering
Stimulated the senses = "Relating to perception by a sensory organ."
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@GregUtas
Where's the CCC? 
"I have no idea what I did, but I'm taking full credit for it." - ThisOldTony
"Common sense is so rare these days, it should be classified as a super power" - Random T-shirt
AntiTwitter: @DalekDave is now a follower!
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I've been looking for information on chip lithography processes used in creating SoCs for IoT devices like the ESP32 based devices.
The ESP32 is @ 40nm which seems huge today, given my AMD APU is at 7nm.
Even when it was released 40nm was kind of big.
Now, these devices are known for low power, but even now, I struggle writing software that will use my ESP32's tensilica CPU in such a way as to extend the operating life on a charge.
If it's a cost issue, I don't think it's a tenable one:
I would pay 4x the price for ultra low power versions of the ESP32 widgets I have.
I don't know as much about other offerings like ARMs and so far googling isn't coming up with much real world info on lithography used across the range of IoT SoC offerings.
But my takeaway is these little chips have some catching up to do in an area where they could sorely use it.
Real programmers use butterflies
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But a thing to remember SoC is intended for embedded devices, which are more prone to static damage.
Stick you 7nM AMD is the envoirment I work in and it will dead with a matter of hours from static/seawater ingress, 40nM will last longer as there is more to be damaged before it pops. While not an issue for most things, if you are mounting it on the sea bed where down time cost a very large telephone number one of the key design requirments is how hard is to break, not how efficient it is. My company looked at getting Siemens to restart making an old chip design as it was 32 bits, big flat pack with hand solderable leads to supply spares.
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That's true, but you'd think given how many people *aren't* using these things in hardcore industrial applications where that is an issue one has to wonder about the dearth of ultra low power versions, even if they are a bit more fragile and expensive. For something like the device I'm currently building it would be a win. For a lot of the things I've seen other people build (though non-commercial in that case it still makes $$ for espressif) it would be a win as well. Just my opinion.
Real programmers use butterflies
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There is definitely a cost factor involved. Those little chips are intended for sale at very low prices. The latest, cutting-edge processor designs are very, very expensive in part because of the cost to fabricate devices with the latest equipment. That does not make very much sense if you want to sell a low-cost device. I remember when I worked on some systems used to make PICs they used rather old technology, being fabbed on 4 and 5-inch wafers when we had recently installed systems at Intel, TSMC, and Samsung that used 12-inch wafers. FWIW, most of our systems were for 6 and 8-inch wafers. The three companies listed above were the only ones that used 12s that we worked with out of over three hundred companies.
I think the real answer to your question is they don't use the latest technology because they do not need to.
"They have a consciousness, they have a life, they have a soul! Damn you! Let the rabbits wear glasses! Save our brothers! Can I get an amen?"
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There is a need though. I mean, on the ESP32 forums (reddit, espressif, anywhere) you'll find people struggling with battery life for their devices.
Plus at the current cost of $5 even making it $20 for a ULP version isn't unreasonable.
Real programmers use butterflies
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Yes, but then that will cause other limitations like complicating interface with external devices. As the song goes, one thing leads to another.
"They have a consciousness, they have a life, they have a soul! Damn you! Let the rabbits wear glasses! Save our brothers! Can I get an amen?"
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how would shrinking the die do that?
They wouldn't even have to change the actual form factor of their chip to shrink the die, much less change the actual functionality
Real programmers use butterflies
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A physically smaller die has less room to attach IO pins; and higher density processes are much more expensive per mm^2; down to about 14nm increased transistor density allowing more parts per wafer is able to keep marginal prices for denser parts down. (Following all the additional/more complex design rules for eg 14nm vs 40nm, along with other fixed setup costs still makes smaller processes a lot more expensive if you're only making a small volume of parts though.)
One of the major drivers 10-20 years ago of Intel cramming more and more stuff into the chipset (most notably a basic GPU) was that the overall size of the die was being set by the number of IO pins it needed, and they had "free space" to put anything that didn't need much more IO into.
Did you ever see history portrayed as an old man with a wise brow and pulseless heart, weighing all things in the balance of reason?
Is not rather the genius of history like an eternal, imploring maiden, full of fire, with a burning heart and flaming soul, humanly warm and humanly beautiful?
--Zachris Topelius
Training a telescope on one’s own belly button will only reveal lint. You like that? You go right on staring at it. I prefer looking at galaxies.
-- Sarah Hoyt
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Yes. Also, shrinking pads and traces will generally reduce their current carrying capacity and that's usually not so good with interfaces.
"They have a consciousness, they have a life, they have a soul! Damn you! Let the rabbits wear glasses! Save our brothers! Can I get an amen?"
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If you are contractually bound to the ESP32, then you are contractually bound to the ESP32. Case closed.
If you are free to switch to another chip, why don't you state your requirements for power consumption, on-chip functionality and maximum cost (for development kit, raw chip or whatever), and other requirements / restrictions?
I don't expect anyone around here to be able to reduce the power consumption of the ESP32, except by trivial measures such as reducing the clock frequency (if that is possible on the ESP32) or being more clever in turning of peripherals when not needed (if that is possible / relevant on the ESP32).
Knowing nothing about your functional requirements (so this may not be relevant for you): If what you need is Bluetooth, the nRF52 / nRF53 IoT SoC chips are recognized for their low power consumption. If going to another chip is an option, take a look at nRF[^]. These chips also support some older wireless technologies such as ANT and Zigbee. If what you need is 4G IoT, there is the nRF91 chip, but I believe that is a more expensive chip.
Off hand, I can't tell which technology these chips are using, but the proof of the pudding is the actual power consumption, not the nanometers. If you have the option to go to another chip, and your target is either Bluetooth or LTE, you could pick up the specifications of the nRF chips from the website for consideration.
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