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And I think I found my most ambitious idea yet.
Training models to make LLMs spit out code for input specs where the code loops hand written.
So like parser generators.
DAL generators
etc.
Different model for each. Each model comes in a nuget package along with a C# source generator that invokes it.
The only thing is it will require hosting your own LLM. I have two 4080s across two machines, so it's not a problem for me - part of why I bought them, but I wonder how practical it is in general.
Check out my IoT graphics library here:
https://honeythecodewitch.com/gfx
And my IoT UI/User Experience library here:
https://honeythecodewitch.com/uix
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honey the codewitch wrote: I have two 4080s across two machines, so it's not a problem for me - part of why I bought them, but I wonder how practical it is in general.
While it might work, I suspect that at the current state of the art it would not be cost-effective. The costs of hardware, collection of training data, classification of the training data, etc. are likely to be more expensive than the time that you'd save on the coding.
Freedom is the freedom to say that two plus two make four. If that is granted, all else follows.
-- 6079 Smith W.
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I mean that I intend to release nuget packages with pretrained models, integrated as C# Source Generators that prompt a local LLM, trained with a (relatively) small model to undertake a specific type of coding task, like generating a parser given a context free grammar.
I am not looking to make an all purpose code generator or anything like that.
My interest is in code synthesis by which I mean generating "hand written" code.
The differences between a generated parser and a hand rolled parser are far deeper than basic cosmetic. The details of how they work are different, even if the principles are the same. Mainly a generated left recursive parser with fixed lookahead will always greedy match. A left recursive descent parser such as hand rolling would produce can switch between lazy and greedy matching, leading to more efficient and often much smaller code.
Check out my IoT graphics library here:
https://honeythecodewitch.com/gfx
And my IoT UI/User Experience library here:
https://honeythecodewitch.com/uix
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I'm wondering if you may have enough patience case waiting for results of a training task lasts longer then one or two days 
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I mean, stable-diffusion runs pretty quickly on my machine.
Check out my IoT graphics library here:
https://honeythecodewitch.com/gfx
And my IoT UI/User Experience library here:
https://honeythecodewitch.com/uix
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Define 'pretty quickliy' 
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Wordle 1,066 3/6
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Wordle 1,066 X/6
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Too many choices. Streak reset to zero.
modified 15hrs ago.
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Wordle 1,066 5/6
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Wordle 1,066 3/6
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Wordle 1,066 4/6*
⬜🟨⬜⬜🟨
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"I have no idea what I did, but I'm taking full credit for it." - ThisOldTony
"Common sense is so rare these days, it should be classified as a super power" - Random T-shirt
AntiTwitter: @DalekDave is now a follower!
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🟨🟨⬜🟨🟨
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In a closed society where everybody's guilty, the only crime is getting caught. In a world of thieves, the only final sin is stupidity. - Hunter S Thompson - RIP
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Wordle 1,066 5/6*
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Happiness will never come to those who fail to appreciate what they already have. -Anon
And those who were seen dancing were thought to be insane by those who could not hear the music. -Frederick Nietzsche
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Wordle 1,066 3/6*
⬛⬛⬛🟨🟨
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I have said it before, and I will say it again:
The only good cat is a dead cat, unless you need a moving target.
Thus, that was not the perfect cat video, as there was no moving target practice shown.
Within you lies the power for good - Use it!
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I previously worked through the book (by one of my favorite tech authors - Jeff Duntemann) x64 Assembly Language Step-by-Step: Programming with Linux[^]
There was a lot of build-up to read just to get to the meat. At least 100 pages or so. It was tough & I read a lot.
This RISC-V Assembly Book Is Amazing!
I recently stumbled upon this new book that I'm reading right now:
RISC-V Assembly Language Programming: Unlock the Power of the RISC-V Instruction Set[^]
This book :
1. gets right to the point - you start writing Assembly almost immediately.
2. Explains things really clearly -- It has helped me put some ideas together that I've never understood and things seem much more clear.
Why Is It Easier?
I believe a lot of it is easier because it is based in the RISC-V Assembly.
Wow! You can really tell that RISC-V was built with all the "lessons learned" from x86/x64 Assembly
Getting the QEMU RISC-V Emulator Was Difficult
One thing that was very difficult was getting the QEMU RISC-V emulator going.
Unfortunately the book's instructions were a bit out of date or wrong.
I found a great blog that got me going in no time[^].
No I can write and run the book's code samples!
The Hardware Is on The Way
I have some hardware (where I can run some of these programs) coming today, too.
ESP32 C3[^]
Only $12 for two of them.
Anyone Else Learning / Writing RISC-V Assembly?
Anyone? Anyone?
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raddevus wrote: One thing that was very difficult was getting the QEMU RISC-V emulator going.
I gave up. QEMU refused to operate in any of my environments. I tried several guides, and nada. 
Check out my IoT graphics library here:
https://honeythecodewitch.com/gfx
And my IoT UI/User Experience library here:
https://honeythecodewitch.com/uix
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honey the codewitch wrote: I gave up. QEMU refused to operate in any of my environments. I tried several guides, and nada.
I felt the same way yesterday. I had spent all day yesterday and could not find any help or get it working.
It was a real pain. I even asked Copilot to help me but it wasn't helpful.
I finally got it working because I found that blog site (mentioned in original post).
I got very lucky.
I really had no idea what I was doing.
Even the blog site had so much information that I barely made it through it.
But, here's the deal.
First of all make sure you've installed QEMU properly on your dev machine:
$ sudo apt install qemu-system-riscv64
$ sudo apt install u-boot-qemu opensbi
After that, all I had to do was:
1) run this command to download a debian image:
$ wget "https://gitlab.com/api/v4/projects/giomasce%2Fdqib/jobs/artifacts/master/download?job=convert_riscv64-virt" -O debian-rv64.zip
2) Then follow these commands:
$ mkdir debian-rv64
$ cd debian-rv64
$ unzip ../debian-rv64.zip
$ cd artifacts NOTE: That last step was wrong bec the directory that gets unzipped is not named artifacts but is named something else.
Inside that "artifacts" directory, there is a readme.txt.
I ignored the rest of the blog author's instructions and followed that readme.
There is a command in there for how to start it:
Note: Edited command because I had line breaks incorrect
qemu-system-riscv64 -machine 'virt' -cpu 'rv64' -m 1G -device virtio-blk-device,drive=hd -drive file=image.qcow2,if=none,id=hd -device virtio-net-device,netdev=net -netdev user,id=net,hostfwd=tcp::2222-:22 -bios /usr/lib/riscv64-linux-gnu/opensbi/generic/fw_jump.elf -kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf -object rng-random,filename=/dev/urandom,id=rng -device virtio-rng-device,rng=rng -nographic -append "root=LABEL=rootfs console=ttyS0"
3rd Edit - With Line Breaks For Easier Reading (tested & it works)
qemu-system-riscv64 -machine 'virt' \
-cpu 'rv64' \
-m 1G -device virtio-blk-device,drive=hd \
-drive file=image.qcow2,if=none,id=hd \
-device virtio-net-device,netdev=net \
-netdev user,id=net,hostfwd=tcp::2222-:22 \
-bios /usr/lib/riscv64-linux-gnu/opensbi/generic/fw_jump.elf \
-kernel /usr/lib/u-boot/qemu-riscv64_smode/uboot.elf \
-object rng-random,filename=/dev/urandom,id=rng \
-device virtio-rng-device,rng=rng \
-nographic \
-append "root=LABEL=rootfs console=ttyS0"
That's it. Once I ran that command I had my RISC-V environment running.
It's running right now.
I had to install the build-essential package and I was able to compile, build, link via as and ld
Cannot believe I got it going.
I hope these steps might help you some time too. 
modified 21hrs ago.
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Thanks. I wish I felt up to right now, but I'll bookmark this. I appreciate it.
Check out my IoT graphics library here:
https://honeythecodewitch.com/gfx
And my IoT UI/User Experience library here:
https://honeythecodewitch.com/uix
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You need to write a CodeProject article for this!
Bond
Keep all things as simple as possible, but no simpler. -said someone, somewhere
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Check this out. I was searching everywhere to better understand how those risc-v 64 linux images were created.
I finally stumbled upon all the steps you need here[^].
But that was way too much. I was thinking, "Why can't I just download the rv64 images I need?"
Finally, I found this link: Debian Quick Image Baker pre-baked images[^]
When you go there and you want a Linux image which runs on risc-v 64 which can be virtualized (run in QEMU), you have to pick the link that looks like: "Images for riscv64-virt"
The link there ( Images for riscv64-virt[^] ) will automatically download a 331MB file named: 2baed3d2ab30e7a4ff39c7e587c8b16dce3885afb2dc047dae555a8bc13e which is a zip file, but doesn't have a zip file extension. Ok, fine.
Well, when you unzip that file, you have everything you need to run the QEMU virtual OS which is Debian which runs on RISC-V. Oh, wow, after 2 days of sitting, staring, reading, searching I finally get it. "Oh, I'm trying to run a virtualized Debian linux which thinks it is running on a RISC-V Processor!" Ohhhhhh.... Man, I'm slow a lot. 
The list of files in that zip are:
* image.qcow2 -- image file
* initrd - linux stuff
* kernel - linux kernel
* readme.txt - readme provides command line for QEMU
* ssh_user_ecdsa_key -- stuff I don't know
* ssh_user_ed25519_key -- don't know
* ssh_user_rsa_key -- don't know.
I think if you follow my steps you may really get your virtual environment finally running.
But, of course maybe you don't care because much is different when you run on "real hardware" (ESP32) anyways. 🤓
Just thought I'd share this with someone else who has been thru the pain of QEMU / RISC-V.
modified 19hrs ago.
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Not all assembly languages are created the same. The Intel/CISC machine languages have their roots in the old IBM 360 mainframes. These are complex instruction sets that require a lot of hardware to implement. The newer RISC instruction sets trade some of this hardware complexity for a significantly simpler machine language implementation using a lot more instructions to do the same functions. We've found that the RISC machines generally operate faster and can be optimized in ways that CISC cannot, which is why even the CISC instruction set used by Intel to this day has become more of a macro language on an underlying RISC instruction set that Intel has highly optimized.
As for having to read 100 pages before getting to the actual assembler, this is the sign of a poor tutorial on assembly. It has nothing to do with the actual language. I ran into the same issue when learning Windows programming until I found Charles Petzgold's books. Same language, same OS, but his books were far better at teaching Windows programming.
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obermd wrote: As for having to read 100 pages before getting to the actual assembler, this is the sign of a poor tutorial on assembly.
Yeah, it's a balance. I mean, to really learn what's going on underneath the surface, a lot has to be explained.
And, since learning Assembly means you need to understand so many concepts (number bases, what hardware is actually doing, tools (compiler, linker, make, etc.)) there can be a lot to learn just to get to where you're learning the target thing.
Petzold's books were long and in depth, but I really enjoyed his style and I felt like he was inviting me into a secret club to learn things that few others knew. 
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